SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 1 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 p-channel 20 v (d-s) mosfet features ? trenchfet ? gen iii p-channel power mosfet ? compact 0.8 mm x 0.8 mm outline area ? low 0.4 mm max. profile ?r ds(on) rating at v gs = -1.5 v ? typical esd protection: 1900 v hbm ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ?load switch ? power management in battery- operated, mobile, and wearable devices notes a. surface mounted on 1" x 1" fr4 board with full copper, t = 5 s. b. surface mounted on 1" x 1" fr4 board with minimum copper, t = 5 s. c. refer to ipc / jedec ? (j-std-020), no manual or hand soldering. d. in this document, any reference to case represents th e body of the micro foot de vice and foot is the bump. e. based on t a = 25 c. f. maximum under steady stat e conditions is 185 c/w. g. maximum under steady stat e conditions is 330 c/w. product summary v ds (v) -20 r ds(on) max. ( ? ) at v gs = -4.5 v 0.095 r ds(on) max. ( ? ) at v gs = -2.5 v 0.120 r ds(on) max. ( ? ) at v gs = -1.8 v 0.200 r ds(on) max. ( ? ) at v gs = -1.5 v 0.335 q g typ. (nc) 6.6 i d (a) -2.7 a configuration single micro foot ? 0.8 x 0.8 back s ide view 1 0.8 mm 0.8 mm xxx xx bump s ide view 1 g 4 d s 3 s 2 1 g s s g d p-channel mo s fet ordering information package micro foot lead (pb)-free and ha logen-free si 8823edb-t2-e1 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds -20 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) t a = 25 c i d -2.7 a a t a = 70 c -2.1 a t a = 25 c -1.9 b t a = 70 c -1.5 b pulsed drain current (t = 100 s) i dm -15 continuous source-drain diode current t a = 25 c i s -0.7 a t a = 70 c -0.4 b maximum power dissipation t a = 25 c p d 0.9 a w t a = 70 c 0.6 a t a = 25 c 0.5 b t a = 70 c 0.3 b operating junction and storage temperature range t j , t stg -55 to +150 c package reflow conditions c vpr 260 ir / convection thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a, f t ? 5 s r thja 105 135 c/w maximum junction-to-ambient b, g 200 260
SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 2 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not su bject to production testing. ? stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = -250 a -20 - - v v ds temperature coefficient ? v ds /t j i d = -250 a - -12.5 - mv/c v gs(th) temperature coefficient ? v gs(th) /t j -2.3- gate-source threshold voltage v gs(th) v ds = v gs , i d = -250 a -0.4 - -0.8 v gate-source leakage i gss v ds = 0 v, v gs = 4.5 v - - 0.5 a v ds = 0 v, v gs = 8 v - - 5 zero gate voltage drain current i dss v ds = -20 v, v gs = 0 v - - -1 v ds = -20 v, v gs = 0 v, t j = 55 c - - -10 on-state drain current a i d(on) v ds ? -5 v, v gs = -4.5 v -5 - - a drain-source on-state resistance a r ds(on) v gs = -4.5 v, i d = -1 a - 0.077 0.095 ? v gs = -2.5 v, i d = -1 a - 0.100 0.120 v gs = -1.8 v, i d = -0.5 a - 0.137 0.185 v gs = -1.5 v, i d = -0.5 a - 0.200 0.335 forward transconductance a g fs v ds = -5 v, i d = -1 a - 6 - s dynamic b input capacitance c iss v ds = -10 v, v gs = 0 v, f = 1 mhz - 580 - pf output capacitance c oss - 165 - reverse transfer capacitance c rss -75- total gate charge q g v ds = -10 v, v gs = -8 v, i d = -1 a - 11 17 nc v ds = -10 v, v gs = -4.5 v, i d = -1 a - 6.6 10 gate-source charge q gs v ds = -10 v, v gs = -4.5 v, i d = -1 a -1- gate-drain charge q gd -1.5- gate resistance r g f = 1 mhz - 20 - ? turn-on delay time t d(on) v dd = -10 v, r l = 10 ? , i d ? -1 a, v gen = -4.5 v, r g = 1 ? -1630 ns rise time t r -3060 turn-off delay time t d(off) - 60 120 fall time t f -4080 turn-on delay time t d(on) v dd = -10 v, r l = 10 ? , i d ? -1 a, v gen = -8 v, r g = 1 ? -715 rise time t r -2040 turn-off delay time t d(off) - 75 150 fall time t f -3570 drain-source body diode characteristics continuous source-drain diode current i s t a = 25 c - - -0.7 a pulse diode forward current i sm ---15 body diode voltage v sd i s = -1 a, v gs = 0 v - -0.8 -1.2 v body diode reverse recovery time t rr i f = -1 a, di/dt = 100 a/s, t j = 25 c -2040ns body diode reverse recovery charge q rr - 7 15 nc reverse recovery fall time t a - 12.5 - ns reverse recovery rise time t b -7.5-
SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 3 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) gate-current vs. gate-source voltage output characteristics on-resistance vs. drain current and gate voltage gate-current vs. ga te-source voltage transfer characteristics capacitance 10 100 1000 10000 0 0.4 0.8 1.2 1.6 2.0 0 3 6 9 12 15 axis title 1st line 2nd line 2nd line i gss - gate current (ma) v gs - gate-to-source voltage (v) 2nd line t j = 25 c 10 100 1000 10000 0 3 6 9 12 15 0 0.5 1 1.5 2 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) 2nd line v gs = 5 v thru 2.5 v v gs = 1 v v gs = 1.5 v v gs = 2 v 10 100 1000 10000 0 0.1 0.2 0.3 0.4 0.5 03691215 axis title 2nd line r ds(on) - on-resistance () i d - drain current (a) 2nd line v gs = 1.5 v v gs = 4.5 v v gs = 2.5 v v gs = 1.8 v 10 100 1000 10000 10 -10 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 03691215 axis title 1st line 2nd line 2nd line i gss - gate current (a) v gs - gate-to-source voltage (v) 2nd line t j = 150 c t j = 25 c 10 100 1000 10000 0 3 6 9 12 15 0 0.5 1 1.5 2 2.5 3 axis title 1st line 2nd line 2nd line i d - drain current (a) v gs - gate-to-source voltage (v) 2nd line t c = 25 c t c =-55 c t c = 125 c 10 100 1000 10000 0 200 400 600 800 1000 0 4 8 12 16 20 axis title 1st line 2nd line 2nd line c - capacitance (pf) v ds - drain-to-source voltage (v) 2nd line c rss c oss c iss
SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 4 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) gate charge source-drain diode forward voltage threshold voltage on-resistance vs. junction temperature on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 10 100 1000 10000 0 2 4 6 8 024681012 axis title 1st line 2nd line 2nd line v gs - gate-to-source voltage (v) q g - total gate charge (nc) 2nd line v ds = 10 v v ds = 16 v v ds = 5 v i d = 1 a 10 100 1000 10000 0.1 1 10 0 0.2 0.4 0.6 0.8 1.0 1.2 axis title 1st line 2nd line 2nd line i s - source current (a) v sd - source-to-drain voltage (v) 2nd line t j = 150 c t j = 25 c 10 100 1000 10000 0.30 0.40 0.50 0.60 0.70 0.80 0.90 -50-25 0 255075100125150 axis title 1st line 2nd line 2nd line v gs(th) (v) t j - temperature (c) 2nd line i d = 250 a 10 100 1000 10000 0.8 0.9 1.0 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 125 150 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance (normalized) t j - junction temperature (c) 2nd line v gs = 1.5 v, i d = 0.5 a v gs = 1.8 v, i d = 0.5 a v gs = 2.5 v, i d = 1 a v gs = 4.5 v, i d = 1 a 10 100 1000 10000 0 0.04 0.08 0.12 0.16 0.20 012345 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () v gs - gate-to-source voltage (v) 2nd line t j = 25 c t j = 125 c i d = 1 a 0 2 4 6 8 10 12 14 power (w) time ( s ) 10 100 1000 0.1 1 0 . 0 1 0 0 .1 0
SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 5 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) current derating a power, junction-to-ambient safe operating area, junction-to-ambient note a. the power di ssipation p d is based on t j max. = 25 c, using junction-to-ca se thermal resistance, and is mo re useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the cu rrent rating, when this rating falls below the package limit. 10 100 1000 10000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0255075100125150 axis title 1st line 2nd line 2nd line i d - drain current (a) t a - ambient temperature (c) 2nd line 0.0 0.2 0.4 0.6 0.8 25 50 75 100 125 150 t a - ambient temperature (c) ower di ss ipation (w) 10 100 1000 10000 0.01 0.1 1 10 100 0.1 1 10 100 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) (1) v gs > minimum v gs at which r ds(on) is specified limited by r ds(on) (1) t a = 25 c single pulse 10 s, 1 s, 100 ms 10 ms 1 ms 100 s dc i d(on) limited bvd ss limited i dm limited
SI8823EDB www.vishay.com vishay siliconix s16-1562-rev. a, 08-aug-16 6 document number: 76852 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient (on 1" x 1" fr4 board with maximum copper) normalized thermal transient impedance, junction-to-ambient (on 1" x 1" fr4 board with minimum copper) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?76852 . 1 1 0 . 0 1 0 0 . 0 10 1000 0.1 0.0001 100 0.2 0.1 sq uare wave pul s e duration ( s ) normalized effective tran s ient thermal impedance 1 0.1 0.01 t 1 t 2 note s : p dm 1. duty cycle, d = 2. per unit ba s e = r thja = 185 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 4. s urface mounted duty cycle = 0.5 s ingle pul s e 0.02 0.05 1 1 0 . 0 1 0 0 . 0 10 1000 0.1 0.0001 100 0.2 0.1 sq uare wave pul s e duration ( s ) normalized effective tran s ient thermal impedance 1 0.1 0.01 duty cycle=0.5 s ingle pul s e 0.02 0.05 t 1 t 2 note s : p dm 1. duty cycle, d = 2. per unit ba s e = r thja 3. t jm - t a = p dm z thja (t) t 1 t 2 4. s urface mounted = 330 c/w
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